6.1 - Introduction to Combinational Circuit and assymetric gates The lecture introduces to the combinational circuit of AND-OR_INVERTER gate size designs. Two different design techniques are discussed for the same design with delay, and area characteristics. The lecture also introduces to Assymetric 2-NAND gate, showcasing the benefits of lower transistor size. The lecture also explains on estimating logical effort and parasitic delay for assymetric gate.