CISC vs RISC Processors Explained

Control Logic (Mostly Theory) *Exam Orientation:* This unit focuses on the internal working of the CPU control unit. Questions are typically theory-heavy, concept-based, and difference-oriented. Most MCQs test identification, comparison, sequencing logic, and understanding of how control signals are generated and timed. --- 1. Hardwired Control Unit Concept of hardwired control logic Generation of control signals using logic gates, decoders, and flip-flops Role of opcode, timing signals, and control signals Finite state machine (FSM) model of hardwired control Advantages and limitations of hardwired control Performance characteristics (speed, complexity) Suitability for RISC architectures Comparison with microprogrammed control unit *Exam Focus:* Identification-based MCQs Advantages vs disadvantages Why hardwired control is faster but less flexible --- 2. Microprogrammed Control Concept of microprogramming Structure of a microprogrammed control unit Role of control memory (ROM / RAM) Microprogram, micro-routine, and micro-operation Sequencing of microinstructions Advantages and limitations of microprogrammed control Suitability for CISC architectures Comparison with hardwired control unit *Exam Focus:* Difference-based MCQs Flexibility vs speed trade-off Identification of microprogrammed control in system descriptions --- 3. Control Memory & Microinstructions Definition and purpose of control memory Organization of control memory Control word and microinstruction format Fields of a microinstruction Control signals generated by microinstructions Relationship between machine instruction and microinstruction sequence Microinstruction sequencing and next-address generation *Exam Focus:* Terminology-based MCQs Identification of control memory functions Relationship between control memory and control unit behavior --- 4. Horizontal vs Vertical Microcode Concept of microinstruction encoding Horizontal microcode: Wide control word One bit per control signal High parallelism Large control memory requirement Vertical microcode: Encoded control fields Narrow control word Reduced memory usage Additional decoding logic Comparison between horizontal and vertical microcode *Exam Focus:* Direct comparison questions Memory usage vs speed Identification of microcode type from description --- 5. Instruction Cycle Control Concept of instruction cycle Phases of instruction cycle: Fetch cycle Decode cycle Execute cycle Memory access (if required) Write-back cycle Role of control unit in managing instruction cycle Timing and sequencing of control signals Relationship between instruction cycle and microinstruction sequencing *Exam Focus:* Ordering-based MCQs Identification of instruction cycle phases Role of control unit in instruction execution --- Overall Exam Weightage & Strategy Mostly theory-based questions High probability of difference-based MCQs Emphasis on control unit type identification Clear understanding of sequencing logic is essential *Recommended Preparation Strategy:* Prepare comparison tables Memorize key characteristics and keywords Focus on diagrams and control flow Practice MCQs from GATE and state-level exams